Ph.D. in Computer Science & Engineering Department of Computer Science and Engineering The Chinese University of Hong Kong Resume/CV (as of Aug., 2024)

BIOGRAPHY

I received the B.E. degree in software engineering from the University of Electronic Science and Technology of China, Chengdu, China, in 2020 and the Ph.D. degree in computer science and engineering from The Chinese University of Hong Kong, Hong Kong, in 2024, under the supervision of Prof. Bei Yu and co-supervised by Prof. Martin D.F. Wong. My research interests include computer architecture and electronic design automation. I received the William J. McCalla Best Paper Award from ICCAD 2021 and the Best Paper Award Nomination from ISPD 2024.

CONTACT

• Email: baichen318 [at] gmail.com
  

RESEARCH INTERESTS

• Computer Architecture & Computer Systems

• Electronic Design Automation (EDA)

EDUCATION

• Ph.D. Computer Science & Engineering, The Chinese University of Hong Kong, Aug. 2020 - Jul. 2024

• B.Eng. Software Engineering, The University of Electronic Science and Technology of China, Sep. 2016 - Jul. 2020

PUBLICATION

* denotes equal contribution.

Conference papers

• [C19] Hongduo Liu, Chen Bai, Peng Xu, Lihao Yin, Xianzhi Yu, Hui-Ling Zhen, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu, “LLMShare: Optimizing LLM Inference Serving with Hardware Architecture Exploration”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025.

• [C18] Peng Xu, Su Zheng, Yuyang Ye, Chen Bai, Siyuan Xu, Hao Geng, Tsung-Yi Ho, Bei Yu, “RankTuner: When Design Tool Parameter Tuning Meets Preference Bayesian Optimization”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C17] Yuanhang Gao, Donger Luo, Chen Bai, Bei Yu, Hao Geng, Qi Sun, Cheng Zhuo, “Is Vanilla Bayesian Optimization Enough for High-Dimensional Architecture Design Optimization?”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), New Jersey, Oct. 27–31, 2024. (paper) (slides)

• [C16] Lancheng Zou, Wenqian Zhao, Shuo Yin, Chen Bai, Qi Sun, Bei Yu, “BiE: Bi-Exponent Block Floating-Point for Large Language Models Quantization”, International Conference on Machine Learning (ICML), Vienna, Jul. 21–27, 2024. (paper) (slides) (poster)

• [C15] Donger Luo, Qi Sun, Xinheng Li, Chen Bai, Bei Yu, Hao Geng, “Knowing The Spec to Explore The Design via Transformed Bayesian Optimization”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper) (slides)

• [C14] Tong Qiao, Jianlei Yang, Yingjie Qi, Ao Zhou, Chen Bai, Bei Yu, Weisheng Zhao, Chunming Hu, “GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline Exploration”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 23–27, 2024. (paper)

• [C13] Chen Bai, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D.F. Wong, “Towards Automated RISC-V Microarchitecture Design with Reinforcement Learning”, AAAI Conference on Artificial Intelligence (AAAI), Vancouver, Feb. 20–27, 2024. (paper) (slides) (code) (poster) (video)

• [C12] Yuan Pu, Tinghuan Chen, Zhuolun He, Chen Bai, Haisheng Zheng, Yibo Lin, Bei Yu, “IncreMacro: Incremental Macro Placement Refinement”, ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024. (Best Paper Candidate)
  (paper) (slides)

• [C11] Shixin Chen, Su Zheng, Chen Bai, Wenqian Zhao, Shuo Yin, Yang Bai, Bei Yu, “SoC-Tuner: An Importance-guided Exploration Framework for DNN-targeting SoC Design”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024.
  (paper) (slides)

• [C10] Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie, “Klotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper) (slides) (poster) (video)

• [C9] Ziyang Yu, Chen Bai, Shoubo Hu, Ran Chen, Taohai He, Mingxuan Yuan, Bei Yu, Martin Wong, “IT-DSE: Invariant Risk Minimized Transfer Microarchitecture Design Space Exploration”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023. (paper) (slides)

• [C8] Chen Bai, Jiayi Huang, Xuechao Wei, Yuzhe Ma, Sicheng Li, Hongzhong Zheng, Bei Yu, Yuan Xie, “ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis”, IEEE/ACM International Symposium on Microarchitecture (MICRO), Toronto, Oct. 28–Nov. 01, 2023.
      (paper) (slides) (code) (poster)

• [C7] Chen Bai*, Sicheng Li*, Xuechao Wei, Bizhao Shi, Yen-Kuang Chen, Yuan Xie, “2022 ICCAD CAD Contest Problem C: Microarchitecture Design Space Exploration”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, Oct. 30–Nov. 3, 2022.
  (Invited Paper) (paper) (slides) (code)

• [C6] Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Bei Yu, Yu Huang, “Functionality Matters in Netlist Representation Learning”, ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, Jul. 10–14, 2022. (paper) (slides)

• [C5] Qi Sun, Chen Bai, Tinghuan Chen, Hao Geng, Xinyun Zhang, Yang Bai, Bei Yu, “Fast and Efficient DNN Deployment via Deep Gaussian Transfer Learning”, IEEE International Conference on Computer Vision (ICCV), Oct. 11-17, 2021. (paper) (slides) (poster)

• [C4] Zhuolun He, Ziyi Wang, Chen Bai, Haoyu Yang, Bei Yu, “Graph Learning-Based Arithmetic Block Identification”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides)

• [C3] Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D.F. Wong, "BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework", IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021.
  (William J. McCalla Best Paper Award) (paper) (slides) (code) (video)

• [C2] Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu, “McPAT-Calib: A Microarchitecture Power Modeling Framework for Modern CPUs”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021. (paper) (slides)

• [C1] Qi Sun, Chen Bai, Hao Geng, Bei Yu, "Deep Neural Network Hardware Deployment Optimization via Advanced Active Learning", IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Feb. 01–05, 2021. (paper) (slides)

Journal papers

• [J10] Yuntao Lu, Chen Bai, Yuxuan Zhao, Ziyue Zheng, Yangdi Lyu, Mingyu Liu, Bei Yu, “DeepVerifier: Learning to Update Test Sequences for Coverage-Guided Verification”, accepted by ACM Transactions on Design Automation of Electronic Systems (TODAES).

• [J9] Yuan Pu, Tinghuan Chen, Zhuolun He, Jiajun Qin, Chen Bai, Haisheng Zheng, Yibo Lin, Bei Yu, “IncreMacro: Incremental Macro Placement Refinement”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). (paper)

• [J8] Wenqian Zhao, Shuo Yin, Chen Bai, Zixiao Wang, Bei Yu, “BAQE: Backend-Adaptive DNN Deployment via Synchronous Bayesian Quantization and Hardware Configuration Exploration”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). (paper)

• [J7] Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie, “Klotski v2: Improved DNN Model Orchestration Framework for Dataflow Architecture Accelerators”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 03, pp. 1045–1058. (paper)

• [J6] Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Yu Huang, Bei Yu, “FGNN2: A Powerful Pre-training Framework for Learning the Logic Functionality of Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 44, no. 01, pp. 227–240, 2025. (paper) (code)

• [J5] Jianwang Zhai, Zichao Ling, Chen Bai, Kang Zhao, Bei Yu, “Machine Learning for Microarchitecture Power Modeling and Design Space Exploration: A Survey”, Journal of Computer Research and Development (J-CRAD), vol. 61, no. 06, pp. 1-19, 2024. (in Chinese) (paper)

• [J4] Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D.F. Wong, “BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 29, no. 01, pp. 1–23, 2024. (paper)

• [J3] Su Zheng, Hao Geng, Chen Bai, Bei Yu, Martin Wong, “Boosting VLSI Design Flow Parameter Tuning with Random Embedding and Multi-objective Trust-region Bayesian Optimization”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 28, no. 05, pp. 1–23, 2023. (paper)

• [J2] Ziyi Wang, Zhuolun He, Chen Bai, Haoyu Yang, Bei Yu, “Efficient Arithmetic Block Identification with Graph Learning and Network-flow”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 08, pp. 2591–2603, 2023. (paper)

• [J1] Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu, “McPAT-Calib: A RISC-V BOOM Microarchitecture Power Modeling Framework”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 01, pp. 243–256, 2023.
  (paper)

Dissertation

• Chen Bai, “Trilogy of Microprocessor Microarchitecture Design Space Exploration: Delving into the Depths”, Ph.D. Dissertation at The Chinese University of Hong Kong, Jul. 2024. (paper)

EXPERIENCE

• Hong Kong University of Science and Technology, Hong Kong SAR, Aug. 2024 - Now
  Postdoctoral Fellow, Department of Electronic & Computer Engineering
  Topic: Focus on compelling challenges spanning computer architecture & systems, and EDA.

• Stealth Startup, Aug. 2024 - Now
  Technical Advisor
  Topic: Drive the implementation of research outcomes to achieve commercialization.

• Alibaba DAMO Academy, Beijing, P.R. China, Jun. 2022 - May. 2024
  Research Intern, Computing Technology Lab
  Topic: RISC-V chip agile design methodology & Next-generation computing substrate (ICCAD 2022 CAD Contest)

• Huawei Hong Kong Research Center, Hong Kong SAR, Jun. 2021 - Apr. 2022
  Research Intern, Turing Core & Key Technologies Development Department, HiSilicon HK
  Topic: Microprocessor design space exploration & Microprocessor power modeling (delivered to Mate70 Pro & Mate X6)

• SenseTime, Beijing, P.R. China, Sep. 2019 - Jul. 2020
  Research Intern, Intelligent Video Generation Group
  Topic: SenseAR DigitalHuman — Audio-Driven Virtual Human (China Daily, above ten million RMB in profits)

• Intel Asia-Pacific R. & D. Center, Shanghai, P.R. China, Jan. 2019 - Jul. 2019
  Engineering Intern, Web Runtime Optimization Group
  Topic: Chrome browser optimization for Intel architecture-based Chromebooks (Chromium patch)

• University of Maryland, Washington, D.C., U.S.A., Jul. 2017 - Aug. 2017
  Visiting Student, School of Public Policy
  Topic: Courses of "Leadership, Innovation, and Decision Making"

TEACHING

• 2023 Spring: CENG3420 Computer Organization and Design

• 2022 Spring: CENG3420 Computer Organization and Design

• 2021 Spring: CENG3420 Computer Organization and Design

• 2020 Fall: ENGG1110E Problem Solving By Programming

INVITED TALKS

• 2023 Peisu Xia Forum, ICT, Chinese Academy of Sciences

• 2022 ACM SIGDA/IEEE CEDA Design Automation WebiNar (DAWN) (video)

SELECTED AWARDS AND HONORS

• ISPD Best Paper Candidate, IEEE CEDA and ACM SIGDA, 2024

• ICCAD Student Scholar Program Travel Support Grant, Futurewei, IEEE CEDA, and ACM SIGDA, 2023

• MICRO 2023 Student Travel Grants, TCuARCH and ACM SIGMICRO, 2023

• William J. McCalla ICCAD Best Paper Award, The IEEE Council on Electronic Design Automation (IEEE CEDA) and the ACM Special Interest Group on Design Automation (ACM SIGDA), 2021

• Full Postgraduate Scholarship, The Chinese University of Hong Kong, 2020 - 2024

• Outstanding Graduate, The Education Department of Sichuan Province, 2020

• Excellent Thesis Award, The University of Electronic Science and Technology of China, 2020

• National Scholarship, Ministry of Education, 2017 - 2018

• National Scholarship, Ministry of Education, 2016 - 2017

• Meritorious Winner of Interdisciplinary Contest on Modeling (ICM), COMAP, INFORMS, SIAM, MAA, ASA, AMS, 2018

PROFESSIONAL SERVICE

Journal Reviewer

• IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)

• ACM Transactions on Design Automation of Electronic Systems (TODAES)

• IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI)

• Integration, the VLSI Journal

• IEEE Design & Test (D&T)

Conference Reviewer

• 2022, 2023, 2024 ACM/IEEE Design Automation Conference (DAC)

• 2022, 2024 ACM/IEEE International Conference on Computer-Aided Design (ICCAD)

• 2022, 2023 ACM/IEEE Asia and South Pacific Design Automation Conference (ASPDAC)

• 2022 ACM/IEEE Workshop on Machine Learning for CAD ((MLCAD)